( en | de | ru )

 

Disambiguation of "Banerjee, Prith"

Author of the publication

copydeleteadd this publication to your clipboard
Balanced Scheduling and Operation Chaining in High-Level Synthesis for FPGA Designs.

, , , and . ISQED, page 595-601. IEEE Computer Society, (2007)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Abhishek Banerjee

Prabuddha Banerjee

Mita Banerjee

Nandakishore Banerjee

Ishan Banerjee

 

Other publications of authors with the same name

Balanced Scheduling and Operation Chaining in High-Level Synthesis for FPGA Designs., , , and . ISQED, page 595-601. IEEE Computer Society, (2007)An overview of a compiler for mapping MATLAB programs onto FPGAs.. ASP-DAC, page 477-482. ACM, (2003)Generation of Control and Data Flow Graphs from Scheduled and Pipelined Assembly Code., , , and . LCPC, volume 4339 of Lecture Notes in Computer Science, page 76-90. Springer, (2005)Adaptive computing: what can it do, where can it go?, , , , , , and . ASP-DAC, page 463. ACM, (2003)Reconfiguration strategies in VLSI processor arrays., and . ICCD, page 418-421. IEEE, (1988)A software pipelining algorithm in high-level synthesis for FPGA architectures., , , , and . ISQED, page 297-302. IEEE Computer Society, (2009)Sustainable data centers: enabled by supply and demand side management., , , and . DAC, page 884-887. ACM, (2009)Automatic Generation of Stream Descriptors for Streaming Architectures., , , , and . ICPP, page 307-312. IEEE Computer Society, (2010)Automatic extraction of function bodies from software binaries., , , and . ASP-DAC, page 928-931. ACM Press, (2005)Resource optimization and deadlock prevention while generating streaming architectures from ordinary programs., , , and . AHS, page 9-16. IEEE, (2011)