Author of the publication

RIRI scheme: A robust instant-responding ratiochronous interface with zero-latency penalty.

, , , and . ISCAS, page 2569-2572. IEEE, (2011)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

DPLink: User Identity Linkage via Deep Neural Network From Heterogeneous Mobility Data., , , , , , and . WWW, page 459-469. ACM, (2019)Understanding Mobile Traffic Patterns of Large Scale Cellular Towers in Urban Environment., , , , and . IEEE/ACM Trans. Netw., 25 (2): 1147-1161 (2017)A Multi-scale Ensemble Learning Model for Cellular Traffic Prediction., , , , , , , and . GLOBECOM, page 209-214. IEEE, (2022)A multi-FPGA based platform for emulating a 100m-transistor-scale processor with high-speed peripherals (abstract only)., , , , and . FPGA, page 283. ACM, (2010)Anonymization and De-Anonymization of Mobility Trajectories: Dissecting the Gaps Between Theory and Practice., , , , , and . IEEE Trans. Mob. Comput., 20 (3): 796-815 (2021)Revealing Physical World Privacy Leakage by Cyberspace Cookie Logs., , , , and . IEEE Trans. Netw. Serv. Manag., 17 (4): 2550-2566 (2020)RIRI scheme: A robust instant-responding ratiochronous interface with zero-latency penalty., , , and . ISCAS, page 2569-2572. IEEE, (2011)Advancements in Federated Learning: Models, Methods, and Privacy., , , and . CoRR, (2023)MCC: A Load Balancing and Deadlock Free Interconnect Network for Cache Coherent Chip Multiprocessors., , , , , and . CSE, page 407-412. IEEE Computer Society, (2012)Co-location social networks: Linking the physical world and cyberspace., , , , , and . ASONAM, page 295-298. IEEE Computer Society, (2016)