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Disambiguation of "Lwin, Ne Kyaw Zwa"

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Radiation-hardened library cell template and its total ionizing dose (TID) delay characterization in 65nm CMOS process.

, , , , , , and . MWSCAS, page 821-824. IEEE, (2014)

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Kyaw Kyaw Win

Phyo Kyaw

Shwe Kyaw

Nyi Nyi Kyaw

Dietrich Kyaw

 

Other publications of authors with the same name

A DPA-Resistant Asynchronous-Logic NoC Router with Dual-Supply-Voltage-Scaling for Multicore Cryptographic Applications., , , , , , , and . ISCAS, page 1-5. IEEE, (2020)High performance low overhead template-based Cell-Interleave Pipeline (TCIP) for asynchronous-logic QDI circuits., , , , , and . ISCAS, page 1762-1765. IEEE, (2016)Radiation-hardened library cell template and its total ionizing dose (TID) delay characterization in 65nm CMOS process., , , , , , and . MWSCAS, page 821-824. IEEE, (2014)Non-profiling based Correlation Optimization Deep Learning Analysis., , , , , , , and . ISCAS, page 2246-2250. IEEE, (2022)Experimental investigation into radiation-hardening-by-design (RHBD) flip-flop designs in a 65nm CMOS process., , , , , and . ISCAS, page 966-969. IEEE, (2016)High Efficiency Early-Complete Brute Force Elimination Method for Security Analysis of Camouflage IC., , , , , and . APCCAS, page 161-164. IEEE, (2020)Low Gate-Count Ultra-Small Area Nano Advanced Encryption Standard (AES) Design., , , , , , , and . ISCAS, page 1-5. IEEE, (2019)An Asynchronous-Logic Masked Advanced Encryption Standard (AES) Accelerator and its Side-Channel Attack Evaluations., , , , , , and . ISCAS, page 2256-2260. IEEE, (2022)Total Ionizing Dose (TID) effects on finger transistors in a 65nm CMOS process., , , , , , and . ISCAS, page 5-8. IEEE, (2016)Dual-Hiding Side-Channel-Attack Resistant FPGA-Based Asynchronous-Logic AES: Design, Countermeasures and Evaluation., , , , , , , and . IEEE J. Emerg. Sel. Topics Circuits Syst., 11 (2): 343-356 (2021)