Author of the publication

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

Design and VLSI implementation of an access processor for a decoupled architecture.

P. Hulina, L. Kurian, E. John, and L. Coraor. Microprocess. Microsystems, 16 (5): 237-247 (1992)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

John B Weaver

Eugene Brand

Eugene Zhang

Eugene Warvariv

Eugene Shalygin

Other publications of authors with the same name

Design and VLSI implementation of an access processor for a decoupled architecture.P. Hulina, L. Kurian, E. John, and L. Coraor. Microprocess. Microsystems, 16 (5): 237-247 (1992)Dendrite-inspired Computing to Improve Resilience of Neural Networks to Faults in Emerging Memory Technologies.L. John, F. França, S. Mitra, Z. Susskind, P. Lima, I. Miranda, E. John, D. Dutra, and M. Breternitz. ICRC, page 1-5. IEEE, (2023)Characterization of Emerging AI Workloads: Neural Logic Machines and Graph Convolutional Networks.C. Davis, P. Stockton, E. John, Z. Susskind, and L. John. CSCI, page 1-6. IEEE, (2022)Caches for Multimedia Workloads: Power and Energy Tradeoffs.D. Kudithipudi, S. Petko, and E. John. IEEE Trans. Multim., 10 (6): 1013-1021 (2008)Topology selection of FPGA look-up tables for low-leakage operation.P. Nair, S. Koppa, E. John, and D. Kudithipudi. ECCTD, page 73-76. IEEE, (2009)FPGA Implementation of MobileNetV2 CNN Model Using Semi-Streaming Architecture for Low Power Inference Applications.N. Shaydyuk, and E. John. ISPA/BDCloud/SocialCom/SustainCom, page 160-167. IEEE, (2020)Analysing the performance of personal computers based on Intel microprocessors for sequence aligning bioinformatics applications.P. Nair, and E. John. Int. J. Bioinform. Res. Appl., 3 (2): 187-205 (2007)Demystifying the MLPerf Training Benchmark Suite.S. Verma, Q. Wu, B. Hanindhito, G. Jha, E. John, R. Radhakrishnan, and L. John. ISPASS, page 24-33. IEEE, (2020)Resource Shared Galois Field Computation for Energy Efficient AES/CRC in IoT Applications.S. Noor, and E. John. IEEE Trans. Sustain. Comput., 4 (4): 340-348 (2019)Instruction Profiling Based Fetch Throttling for Wasted Dynamic Power Reduction.A. Owahid, and E. John. SBAC-PAD, page 29-32. IEEE, (2019)

BibSonomy

Disambiguation of "John, Eugene B."

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

Design and VLSI implementation of an access processor for a decoupled architecture.

Please choose a person to relate this publication to

John B Weaver

Eugene Brand

Eugene Zhang

Eugene Warvariv

Eugene Shalygin

Other publications of authors with the same name

Disambiguation

BibSonomy

Disambiguation of "John, Eugene B."

copydeleteadd this publication to your clipboardcommunity posthistory of this postURLDOIBibTeXEndNoteAPAChicagoDIN 1505HarvardMSOffice XML Design and VLSI implementation of an access processor for a decoupled architecture.

Please choose a person to relate this publication to

John B Weaver

Eugene Brand

Eugene Zhang

Eugene Warvariv

Eugene Shalygin

Other publications of authors with the same name

Disambiguation

copy delete add this publication to your clipboard
community post
history of this post
URL
DOI
BibTeX
EndNote
APA
Chicago
DIN 1505
Harvard
MSOffice XML

Design and VLSI implementation of an access processor for a decoupled architecture.