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Improving Performance of a Path-Based Equivalence Checker Using Counter-Examples., , and . VLSID, page 377-382. IEEE, (2019)Verification of Scheduling in High-level Synthesis., , , , and . ISVLSI, page 141-146. IEEE Computer Society, (2006)A Value Propagation Based Equivalence Checking Method for Verification of Code Motion Techniques., , , and . ISED, page 67-71. IEEE, (2012)Register Sharing Verification During Data-Path Synthesis., , , and . ICCTA, page 135-140. IEEE Computer Society, (2007)xMAS Based Accurate Modeling and Progress Verification of NoCs., , and . VDAT, volume 711 of Communications in Computer and Information Science, page 792-804. Springer, (2017)User Guided Register Manipulation in Digital Circuits., , and . VDAT, volume 1066 of Communications in Computer and Information Science, page 468-481. Springer, (2019)Formal verification of code motion techniques using data-flow-driven equivalence checking., , and . ACM Trans. Design Autom. Electr. Syst., 17 (3): 30:1-30:37 (2012)HOST: HLS Obfuscations against SMT ATtack., , , , and . DATE, page 32-37. IEEE, (2021)SAT Based Partial Attack on Compound Logic Locking., , , and . AsianHOST, page 1-6. IEEE, (2020)Fairness of transitions in diagnosability analysis of hybrid systems., , , , , and . ACC, page 1-6. IEEE, (2006)