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Digital Compensation Techniques for Frequency-Translating Hybrid Analog-to-Digital Converters., , and . IEEE Trans. Instrumentation and Measurement, 60 (3): 758-767 (2011)An O(1) time complexity sorting network for small number of inputs with hardware implementation., , , and . Microprocess. Microsystems, (2020)Low Complexity Multiplierless Welch Estimator Based on Memory-Based FFT., , and . J. Circuits Syst. Comput., 31 (15): 2220003:1-2220003:15 (2022)A 1.2 GHz jitter-peaking-free Integer-N PLL., , and . Microelectron. J., (2021)A low-power low-noise CMOS bio-potential amplifier for multi-channel neural recording with active DC-rejection and current sharing., and . Microelectron. J., (2019)A 0.35µm CMOS comparator circuit for high-speed ADC applications., , and . ISCAS (6), page 6134-6137. IEEE, (2005)A 4-bit 5 GS/s flash A/D converter in 0.18µm CMOS., , and . ISCAS (6), page 6138-6141. IEEE, (2005)A 12.5Gb/s active-inductor based transmitter for I/O applications., , , , and . ECCTD, page 186-189. IEEE, (2011)Pseudo-impulse tail current shaping for phase noise reduction in CMOS LC oscillators., and . Microelectron. J., (2018)Design of a direct conversion ultra low power ZigBee receiver RF front-end for wireless sensor networks., , , and . Microelectron. J., 44 (4): 347-353 (2013)