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A Digital Receive Beamforming IC for High-Frequency Ultrasound Imaging System.

, , , , , and . ASICON, page 1-4. IEEE, (2023)

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A Fast-Lock-In ADPLL with High-Resolution and Low-Power DCO for SoC Applications., , and . APCCAS, page 105-108. IEEE, (2006)A low-power and small-area all-digital spread-spectrum clock generator in 65nm CMOS technology., , and . VLSI-DAT, page 1-4. IEEE, (2012)An All-Digital Large-N Audio Frequency Synthesizer for HDMI Applications., , , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 59-II (7): 424-428 (2012)High-Timing-Resolution and Low-Complexity Cell-Based Digitally Controlled Oscillator., , , and . ICCE-TW, page 1-2. IEEE, (2020)A Digital Receive Beamforming IC for High-Frequency Ultrasound Imaging System., , , , , and . ASICON, page 1-4. IEEE, (2023)An all-digital phase-locked loop compiler with liberty timing files., , and . VLSI-DAT, page 1-4. IEEE, (2014)A 0.5V/1.0V fast lock-in ADPLL for DVFS battery-powered devices., , and . VLSI-DAT, page 1-4. IEEE, (2013)A compact adaptive equalizer IC for HIPERLAN system., , , , and . ISCAS, page 265-268. IEEE, (2000)A high-resolution and one-cycle conversion time-to-digital converter architecture for PET image applications., , , and . EMBC, page 2461-2464. IEEE, (2013)An all digital spread spectrum clock generator with programmable spread ratio for SoC applications., , and . APCCAS, page 850-853. IEEE, (2008)