Author of the publication

The Effect of Presentation on Visual Working Memory.

, , and . HCI (26), volume 434 of Communications in Computer and Information Science, page 346-350. Springer, (2014)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

The Effect of Presentation on Visual Working Memory., , and . HCI (26), volume 434 of Communications in Computer and Information Science, page 346-350. Springer, (2014)System level approach for low energy consumption in wireless personal area networks., and . ICCE, page 520-521. IEEE, (2016)Classification of pathological voice into normal/benign/malignant state., and . EUROSPEECH, page 571-574. ISCA, (1999)Analysis of disordered speech signal using wavelet transform., and . ICSLP, ISCA, (1998)HeM3D: Heterogeneous Manycore Architecture Based on Monolithic 3D Vertical Integration., , , , , and . CoRR, (2020)Front-end of line and middle-of-line time-dependent dielectric breakdown reliability simulator for logic circuits., , , , and . Microelectron. Reliab., (2017)Bayesian Optimization over Permutation Spaces., , , and . AAAI, page 6515-6523. AAAI Press, (2022)25.2 A 16Gb Sub-1V 7.14Gb/s/pin LPDDR5 SDRAM Applying a Mosaic Architecture with a Short-Feedback 1-Tap DFE, an FSS Bus with Low-Level Swing and an Adaptively Controlled Body Biasing in a 3rd-Generation 10nm DRAM., , , , , , , , , and 24 other author(s). ISSCC, page 346-348. IEEE, (2021)Power, Performance, and Thermal Trade-offs in M3D-enabled Manycore Chips., , , , , and . DATE, page 1752-1757. IEEE, (2020)A 60nm 6Gb/s/pin GDDR5 Graphics DRAM with Multifaceted Clocking and ISI/SSN-Reduction Techniques., , , , , , , , , and 16 other author(s). ISSCC, page 278-279. IEEE, (2008)