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A performance evaluator for parameterized ASIC architectures., , and . EURO-DAC, page 66-71. IEEE Computer Society, (1994)Accurate timed RTOS model for transaction level modeling., , , and . DATE, page 1333-1336. IEEE Computer Society, (2010)Automatic generation of cells for recurrence structures., and . DAC, page 306-313. ACM/IEEE, (1981)New Strategies for System-Level Design.. DDECS, page 15. IEEE Computer Society, (2007)Embedded system environment: A framework for TLM-based design and prototyping., , , , , and . International Symposium on Rapid System Prototyping, page 1-7. IEEE, (2010)Trace-Driven Performance Estimation of multi-core platforms., and . MWSCAS, page 627-630. IEEE, (2014)Software estimation using a generic-processor model., , and . ED&TC, page 498-502. IEEE Computer Society, (1995)100-hour design cycle: a test case., , , , and . EURO-DAC, page 144-149. IEEE Computer Society, (1994)Condition graphs for high-quality behavioral synthesis., , and . ICCAD, page 170-174. IEEE Computer Society / ACM, (1994)System clock estimation based on clock slack minimization., and . EURO-DAC, page 66-71. IEEE Computer Society Press, (1992)