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Mechanism for return stack and branch history corrections under misprediction in deep pipeline design.

, , , and . ACSAC, page 1-8. IEEE Computer Society, (2008)

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Exploiting Java Bytecode Parallelism by Enhanced POC Folding Model (Research Note)., , and . Euro-Par, volume 1900 of Lecture Notes in Computer Science, page 994-997. Springer, (2000)Exploiting Parallelism in the H.264 Deblocking Filter by Operation Reordering., , and . ICA3PP (1), volume 7016 of Lecture Notes in Computer Science, page 80-92. Springer, (2011)Register renaming for x86 superscalar design., , and . ICPADS, page 336-343. IEEE Computer Society, (1996)Effects and Handling of Instruction Class Contention in Superscalar Processing., and . Int. J. High Speed Comput., 6 (3): 357-373 (1994)Early load: Hiding load latency in deep pipeline processor., , , and . ACSAC, page 1-8. IEEE Computer Society, (2008)Set Utilization Based Dynamic Shared Cache Partitioning., and . ICPADS, page 284-291. IEEE Computer Society, (2011)Instruction Fetch Energy Reduction Using Forward-Branch Bufferable Innermost Loop Buffer., , and . CDES, page 91-96. CSREA Press, (2006)Low-Power Branch Prediction., , , , and . CDES, page 211-217. CSREA Press, (2005)ETAHM: an energy-aware task allocation algorithm for heterogeneous multiprocessor., , , and . DAC, page 776-779. ACM, (2008)Exploiting fine-grain parallelism in the H.264 deblocking filter by operation reordering., and . Future Gener. Comput. Syst., (2014)