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Two-Level Minimization of Multivalued Functions with Large Offsets., , , and . IEEE Trans. Computers, 42 (11): 1325-1342 (1993)DAG-aware AIG rewriting a fresh look at combinational logic synthesis., , and . DAC, page 532-535. ACM, (2006)River PLAs: a regular circuit structure., and . DAC, page 201-206. ACM, (2002)Generalized cofactoring for logic function evaluation., , and . DAC, page 155-158. ACM, (2003)Scalable don't-care-based logic optimization and resynthesis., , , and . FPGA, page 151-160. ACM, (2009)Improvements to technology mapping for LUT-based FPGAs., , and . FPGA, page 41-49. ACM, (2006)Semi-detailed bus routing with variation reduction., and . ISPD, page 143-150. ACM, (2007)Verifying Continuous Time Markov Chains., , , and . CAV, volume 1102 of Lecture Notes in Computer Science, page 269-276. Springer, (1996)VIS: A System for Verification and Synthesis., , , , , , , , , and 6 other author(s). CAV, volume 1102 of Lecture Notes in Computer Science, page 428-432. Springer, (1996)Timed Boolean functions - a unified formalism for exact timing analysis., and . The Kluwer international series in engineering and computer science Kluwer, (1994)