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Другие публикации лиц с тем же именем

Scalable Hardware Memory Disambiguation for High ILP Processors., , , , и . MICRO, стр. 399-410. IEEE Computer Society, (2003)Dataflow Predication., , , , , , и . MICRO, стр. 89-102. IEEE Computer Society, (2006)Distributed Microarchitectural Protocols in the TRIPS Prototype Processor., , , , , , , , , и 7 other автор(ы). MICRO, стр. 480-491. IEEE Computer Society, (2006)Merging Head and Tail Duplication for Convergent Hyperblock Formation., , , и . MICRO, стр. 65-76. IEEE Computer Society, (2006)Use ECP, not ECC, for hard failures in resistive memories., , , и . ISCA, стр. 141-152. ACM, (2010)Memory Bandwidth Limitations of Future Microprocessors., , и . ISCA, стр. 78-89. ACM, (1996)Efficient Synchronization: Let Them Eat QOLB., , и . ISCA, стр. 170-180. ACM, (1997)Architecture support for disciplined approximate programming., , , и . ASPLOS, стр. 301-312. ACM, (2012)Measuring Experimental Error in Microprocessor Simulation., , и . ISCA, стр. 266-277. ACM, (2001)Priority-based cache allocation in throughput processors., , , , , , , и . HPCA, стр. 89-100. IEEE Computer Society, (2015)