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A 640 Mbit/S 32-Bit Pipelined Implementation of the AES Algorithm., , , и . SECRYPT, стр. 453-459. INSTICC Press, (2008)From Ambiguous Regular Expressions to Deterministic Parsing Automata., , , и . CIAA, том 9223 из Lecture Notes in Computer Science, стр. 35-48. Springer, (2015)Exploring Cortex-M Microarchitectural Side Channel Information Leakage., , , и . IEEE Access, (2021)Shift-Reduce Parsers for Transition Networks., , и . LATA, том 8370 из Lecture Notes in Computer Science, стр. 222-235. Springer, (2014)Parallel Hardware Architectures for the Cryptographic Tate Pairing., , , и . ITNG, стр. 186-191. IEEE Computer Society, (2006)Concurrent Fault Detection in a Hardware Implementation of the RC5 Encryption Algorithm., , , , и . ASAP, стр. 423-432. IEEE Computer Society, (2003)A Fault Attack Against the FOX Cipher Family., , и . FDTC, том 4236 из Lecture Notes in Computer Science, стр. 98-105. Springer, (2006)Window-based dedicated parallel architectures for image processing., и . ICPR (4), стр. 199-203. IEEE, (1992)A Parallelized Design for an Elliptic Curve Cryptosystem Coprocessor., , , и . ITCC (1), стр. 626-630. IEEE Computer Society, (2005)A serial-input serial-output bit-sliced convolver., и . ICCD, стр. 490-495. IEEE, (1988)