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FPGA device and architecture evaluation considering process variations.

, , , and . ICCAD, page 19-24. IEEE Computer Society, (2005)

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A Hierachical Method for Wiring and Congestion Prediction., , , , , , and . ISVLSI, page 307-308. IEEE Computer Society, (2005)Non-Gaussian statistical timing analysis using second-order polynomial fitting., , and . ASP-DAC, page 298-303. IEEE, (2008)A fast congestion estimator for routing with bounded detours., , , and . ASP-DAC, page 666-670. IEEE Computer Society, (2004)Device and architecture co-optimization for FPGA power reduction., , , , and . DAC, page 915-920. ACM, (2005)Accounting for non-linear dependence using function driven component analysis., , and . ASP-DAC, page 474-479. IEEE, (2009)Fourier Series Approximation for Max Operation in Non-Gaussian and Quadratic Statistical Static Timing Analysis., , , , , and . IEEE Trans. Very Large Scale Integr. Syst., 20 (8): 1383-1391 (2012)Congestion Estimation for 3D Routing., , , and . ISVLSI, page 239-240. IEEE Computer Society, (2004)Physically justifiable die-level modeling of spatial variation in view of systematic across wafer variability., , , , and . DAC, page 104-109. ACM, (2009)Non-Linear Statistical Static Timing Analysis for Non-Gaussian Variation Sources., , and . DAC, page 250-255. IEEE, (2007)On confidence in characterization and application of variation models., , and . ASP-DAC, page 751-756. IEEE, (2010)