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Disambiguation of "Patel, Minesh"

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Understanding RowHammer Under Reduced Wordline Voltage: An Experimental Study Using Real DRAM Devices.

, , , , , , , , , and . DSN, page 475-487. IEEE, (2022)

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Katrin Pätel

Devang Patel

Niranjan Patel

Jashwant Patel

Bhulabhai Patel

 

Other publications of authors with the same name

SIMDRAM: An End-to-End Framework for Bit-Serial SIMD Computing in DRAM., , , , , , , , , and . CoRR, (2021)SIMDRAM: A Framework for Bit-Serial SIMD Processing Using DRAM., , , , , , , , , and . CoRR, (2020)Are We Susceptible to Rowhammer? An End-to-End Methodology for Cloud Providers., , , , , , and . SP, page 712-728. IEEE, (2020)CoNDA: efficient cache coherence support for near-data accelerators., , , , , , , , , and 1 other author(s). ISCA, page 629-642. ACM, (2019)SIMDRAM: a framework for bit-serial SIMD processing using DRAM., , , , , , , , , and . ASPLOS, page 329-345. ACM, (2021)A novel method for power line interference suppression., , , , , , and . ICASSP, page 1529-1532. IEEE Computer Society, (1999)BlockHammer: Preventing RowHammer at Low Cost by Blacklisting Rapidly-Accessed DRAM Rows., , , , , , , , , and 2 other author(s). HPCA, page 345-358. IEEE, (2021)The Virtual Block Interface: A Flexible Alternative to the Conventional Virtual Memory Framework., , , , , , , , , and . ISCA, page 1050-1063. IEEE, (2020)Solar-DRAM: Reducing DRAM Access Latency by Exploiting the Variation in Local Bitlines., , , and . ICCD, page 282-291. IEEE Computer Society, (2018)Reducing DRAM Latency via Charge-Level-Aware Look-Ahead Partial Restoration., , , , , , , , , and . MICRO, page 298-311. IEEE Computer Society, (2018)