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Hardware Performance Characterization of Block Cipher Structures.

L. Xiao, и H. Heys. CT-RSA, том 2612 из Lecture Notes in Computer Science, стр. 176-192. Springer, (2003)

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Jan Heys

Rurik Heys

Howard Nelson

Howard Foster

Howard Li

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A pipelined implementation of the grØstl hash algorithm and the advanced encryption standard.K. Guo, и H. Heys. CCECE, стр. 1-4. IEEE, (2013)An ultra compact block cipher for serialized architecture implementations.C. Wang, и H. Heys. CCECE, стр. 1085-1090. IEEE, (2009)Hardware implementation of a high speed self-synchronizing cipher mode.Y. Tian, и H. Heys. CCECE, стр. 695-700. IEEE, (2015)Pipelined Statistical Cipher Feedback: A New Mode for High-Speed Self-Synchronizing Stream Encryption.H. Heys, и L. Zhang. IEEE Trans. Computers, 60 (11): 1581-1595 (2011)Architecture and Performance Analysis of the Multicast Balanced Gamma Switch for Broadband Communications1.C. Li, R. Venkatesan, и H. Heys. AICCSA, стр. 381-388. IEEE Computer Society, (2006)Avalanche Characteristics of Substitution-Permutation Encryption Networks.H. Heys, и S. Tavares. IEEE Trans. Computers, 44 (9): 1131-1139 (1995)Error burst analysis of a statistical self-synchronizing mode of block ciphers.H. Heys. Secur. Commun. Networks, 9 (16): 3340-3352 (2016)Robust CNFET Circuit Sizing Optimization.Z. Heshmatpour, L. Zhang, и H. Heys. VLSI-DAT, стр. 1-4. IEEE, (2022)An Analysis of the Statistical Self-Synchronization of Stream Ciphers.H. Heys. INFOCOM, стр. 897-904. IEEE Comptuer Society, (2001)Template attacks based on static power analysis of block ciphers in 45-nm CMOS environment.J. Xu, и H. Heys. MWSCAS, стр. 1256-1259. IEEE, (2017)

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