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Disambiguation of "Zhai, Antonia"

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Supporting Speculative Multithreading on Simultaneous Multithreaded Processors.

, , , , and . HiPC, volume 4297 of Lecture Notes in Computer Science, page 148-158. Springer, (2006)

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Ke Zhai

Hongchen Zhai

Can Zhai

Wei Zhai

Junnai Zhai

 

Other publications of authors with the same name

Issues and Support for Dynamic Register Allocation., , , and . Asia-Pacific Computer Systems Architecture Conference, volume 4186 of Lecture Notes in Computer Science, page 351-358. Springer, (2006)Energy-efficient non-minimal path on-chip interconnection network for heterogeneous systems., , , , and . ISLPED, page 57-62. ACM, (2012)Leveraging Transactional Execution for Memory Consistency Model Emulation., and . ACM Trans. Archit. Code Optim., 12 (3): 29:1-29:24 (2015)A General Compiler Framework for Speculative Optimizations Using Data Speculative Code Motion., , , and . CGO, page 280-290. IEEE Computer Society, (2005)Multi-stage coordinated prefetching for present-day processors., , , and . ICS, page 73-82. ACM, (2014)Managing shared last-level cache in a heterogeneous multicore processor., , , and . PACT, page 225-234. IEEE Computer Society, (2013)Energy-Efficient Time-Division Multiplexed Hybrid-Switched NoC for Heterogeneous Multicore Systems., , , and . IPDPS, page 293-303. IEEE Computer Society, (2014)Loop Selection for Thread-Level Speculation., , , , and . LCPC, volume 4339 of Lecture Notes in Computer Science, page 289-303. Springer, (2005)Unleashing the Power of Learning: An Enhanced Learning-Based Approach for Dynamic Binary Translation., , , , and . USENIX ATC, page 77-90. USENIX Association, (2019)Efficient and scalable cross-ISA virtualization of hardware transactional memory., , , and . CGO, page 107-120. ACM, (2020)