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Case study of scan chain diagnosis and PFA on a low yield wafer.

, , , , , и . ITC, стр. 818. IEEE Computer Society, (2010)

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Pu Chen

Jianfeng Pu

M Tingart

Wen-tsi Ting

Jielin Pu

 

Другие публикации лиц с тем же именем

Scan Chain Diagnosis by Adaptive Signal Profiling with Manufacturing ATPG Patterns., , , , , и . Asian Test Symposium, стр. 35-40. IEEE Computer Society, (2009)Case study of scan chain diagnosis and PFA on a low yield wafer., , , , , и . ITC, стр. 818. IEEE Computer Society, (2010)Customized Algorithms for High Performance Memory Test in Advanced Technology Node., , , и . Asian Test Symposium, стр. 87-89. IEEE Computer Society, (2009)Faster defect localization in nanometer technology based on defective cell diagnosis., , , , , , , и . ITC, стр. 1-10. IEEE Computer Society, (2007)Diagnosing timing related cell internal defects for FinFET technology., , , , и . VLSI-DAT, стр. 1-4. IEEE, (2015)Automotive semiconductor test., и . VLSI-DAT, стр. 1-4. IEEE, (2017)Comprehensive Power-Aware ATPG Methodology for Complex Low-Power Designs., , , , , , , и . ITC, стр. 334-339. IEEE, (2022)Test cycle power optimization for scan-based designs., , , , и . ITC, стр. 134-143. IEEE Computer Society, (2010)Diagnosis and Layout Aware (DLA) scan chain stitching., , , , , , , , , и 5 other автор(ы). ITC, стр. 1-10. IEEE Computer Society, (2013)