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Parallel implementation of finite state machines for reducing the latency of stochastic computing., and . ISQED, page 335-340. IEEE, (2018)Cost-quality trade-offs of approximate memory repair mechanisms for image data., , and . ISQED, page 438-444. IEEE, (2017)A Stepwise Approach to Software-Hardware Performance Co-optimization Using Design of Experiments., , , and . Int. CMG Conference, Computer Measurement Group, (2013)Design of a spintronic arithmetic and logic unit using magnetic tunnel junctions., , , , and . Conf. Computing Frontiers, page 171-178. ACM, (2008)Performing bitwise logic operations in cache using spintronics-based magnetic tunnel junctions., and . Conf. Computing Frontiers, page 33. ACM, (2011)Exploiting the Prefetching Effect Provided by Executing Mispredicted Load Instructions., , and . Euro-Par, volume 2400 of Lecture Notes in Computer Science, page 468-480. Springer, (2002)Increasing Instruction-Level Parallelism with Instruction Precomputation (Research Note)., , and . Euro-Par, volume 2400 of Lecture Notes in Computer Science, page 481-485. Springer, (2002)Work-in-Progress: ExpCache: Online-Learning based Cache Replacement Policy for Non-Volatile Memory., , , , , and . CASES, page 7-8. IEEE, (2022)Energy-Efficient Pulse-Based Convolution for Near-Sensor Processing., , , and . ISCAS, page 1-5. IEEE, (2020)Enhancing the Top-Down Microarchitectural Analysis Method Using Purchasing Power Parity Theory., , and . LCPC, volume 13149 of Lecture Notes in Computer Science, page 163-177. Springer, (2020)