From post

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed.

 

Другие публикации лиц с тем же именем

An Educational Tool for Design Automation of CMOS Cells., , и . MSE, стр. 149-150. IEEE Computer Society, (2007)Efficient shift-adds design of digit-serial multiple constant multiplications., , , , и . ACM Great Lakes Symposium on VLSI, стр. 61-66. ACM, (2011)An automated design methodology for layout generation targeting power leakage minimization., , и . ICECS, стр. 81-84. IEEE, (2009)Design of Digit-Serial FIR Filters: Algorithms, Architectures, and a CAD Tool., , , , и . IEEE Trans. Very Large Scale Integr. Syst., 21 (3): 498-511 (2013)An Efficient Low Power Multiple-Value Look-Up Table Targeting Quaternary FPGAs., , , и . PATMOS, том 6448 из Lecture Notes in Computer Science, стр. 84-93. Springer, (2010)Phase-Locked Loop Automatic Layout Generation and Transient Fault Injection Analysis: A Case Study., , и . IOLTS, стр. 165-172. IEEE Computer Society, (2006)Optimization of area in digit-serial Multiple Constant Multiplications at gate-level., , , , и . ISCAS, стр. 2737-2740. IEEE, (2011)Voltage-mode quaternary FPGAs: An evaluation of interconnections., , , и . ISCAS, стр. 869-872. IEEE, (2010)A New Macro-cell Generation Strategy for three metal layer CMOS Technologies., , , и . VLSI-SOC, стр. 193-197. Technische Universität Darmstadt, Insitute of Microelectronic Systems, (2003)Efficient timing closure with a transistor level design flow., , , , и . VLSI-SoC, стр. 312-315. IEEE, (2007)