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Disambiguation of "Banerji, Dilip K."

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Near-linear wirelength estimation for FPGA placement.

, , , , and . CCECE, page 1198-1203. IEEE, (2009)

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Sangeeta Banerji

Nibaron Banerji

Anashua Banerji

Amitabh Banerji

Ranadev Banerji

 

Other publications of authors with the same name

A Novel Implementation Method for Addition and Subtraction in Residue Number Systems.. IEEE Trans. Computers, 23 (1): 106-109 (1974)Representation and processing of fractions in a residue system., and . IEEE Symposium on Computer Arithmetic, page 29-36. IEEE Computer Society, (1983)Synthesis of decentralised controllers from high level description., , , and . Microprocess. Microprogramming, 22 (3): 217-229 (1988)Shrubbery: A New Algorithm for Quickly Growing High-Quality Steiner Trees., , , and . VLSI Design, page 855-862. IEEE Computer Society, (2004)Ä novel implementation method for addition and subtraction in residue number systems".. IEEE Symposium on Computer Arithmetic, page 1-15. IEEE Computer Society, (1972)An integrated approach to retargetable code generation., , , and . HLSS, page 70-75. ACM, (1994)Assigning data to dual memory banks in DSPs with a genetic algorithm using a repair heuristic., , , and . Appl. Intell., 26 (1): 53-67 (2007)Clustering Hanan Points to Reduce Vlsi Interconnect Routing Times., , and . CCECE, page 1223-1227. IEEE, (2006)Test plan generation and concurrent scheduling of tests in the presence of conflicts., , , and . Great Lakes Symposium on VLSI, page 243-248. IEEE, (1991)An ILP Solution for Simultaneous Scheduling, Allocation, and Binding in Multiple Block Synthesis., , and . ICCD, page 581-586. IEEE Computer Society, (1994)