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Disambiguation of "Sano, Eiichi"

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An 80-Gb/s optoelectronic delayed flip-flop IC using resonant tunneling diodes and uni-traveling-carrier photodiode.

, , , , , and . IEEE J. Solid State Circuits, 36 (2): 281-289 (2001)

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Eiichi Shimomissé

Kazuhiko Sano

Shigeo Sano

Britta Sano

Ahmed Abd El-Ghani Sanousi

 

Other publications of authors with the same name

Column parallel single-slope ADC with time to digital converter for CMOS imager., , , and . ICECS, page 863-866. IEEE, (2010)40-Gb/s ICs for future lightwave communications systems., , , , , , , and . IEEE J. Solid State Circuits, 32 (9): 1363-1370 (1997)High-speed lightwave communication ICs based on III-V compound semiconductors.. IEEE Commun. Mag., 39 (1): 154-158 (2001)60-GHz, 9-µW wake-up receiver for short-range wireless communications., , and . ESSCIRC, page 383-386. IEEE, (2013)A 32×32-Pixel 0.9THz Imager with Pixel-Parallel 12b VCO-Based ADC in 0.18μm CMOS., , , , , , , , and . ISSCC, page 108-110. IEEE, (2019)A 11b 5.1µW multi-slope ADC with a TDC using multi-phase clock signals., , , and . ICECS, page 512-515. IEEE, (2012)Structure-Sensitive Design for Wider Tunable Operation of Terahertz Plasmon-Resonant Photomixer., , , , and . IEICE Trans. Electron., 89-C (7): 985-992 (2006)W-Band Active Integrated Antenna Oscillator Based on Full-Wave Design Methodology and 0.1-µm Gate InP-Based HEMTs., , , , and . IEICE Trans. Electron., 89-C (7): 954-958 (2006)A novel high-speed latching operation flip-flop (HLO-FF) circuit and its application to a 19-Gb/s decision circuit using a 0.2-μm GaAs MESFET., , , , , and . IEEE J. Solid State Circuits, 30 (10): 1101-1108 (October 1995)A 0.6-4.5 GHz inductorless CMOS low noise amplifier with gyrator-C network., , , , and . ICECS, page 326-329. IEEE, (2011)