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Kill the Program Counter: Reconstructing Program Behavior in the Processor Cache Hierarchy.

, , , , , и . ASPLOS, стр. 737-749. ACM, (2017)

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Daniel Arturo Muñoz Jiménez

Raúl Jiménez

Carlos Jiménez

Víctor Jiménez

Alejandro Jiménez

 

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Combining Edge Vector and Event Counter for Time-Dependent Power Behavior Characterization., , и . Trans. High Perform. Embed. Archit. Compil., (2009)The Camino Compiler infrastructure., , , и . SIGARCH Comput. Archit. News, 33 (5): 3-8 (2005)Efficient Program Power Behavior Characterization., , и . HiPEAC, том 4367 из Lecture Notes in Computer Science, стр. 183-197. Springer, (2007)The impact of cache inclusion policies on cache management techniques., и . MEMSYS, стр. 428-438. ACM, (2019)Whisper: Profile-Guided Branch Misprediction Elimination for Data Center Applications., , , , , , и . MICRO, стр. 19-34. IEEE, (2022)Fast Path-Based Neural Branch Prediction.. MICRO, стр. 243-252. IEEE Computer Society, (2003)Insertion and promotion for tree-based PseudoLRU last-level caches.. MICRO, стр. 284-296. ACM, (2013)Kill the Program Counter: Reconstructing Program Behavior in the Processor Cache Hierarchy., , , , , и . ASPLOS, стр. 737-749. ACM, (2017)Decoupled Cache Segmentation: Mutable Policy with Automated Bypass., и . PACT, стр. 212. IEEE Computer Society, (2011)Improving cache performance using read-write partitioning., , , , и . HPCA, стр. 452-463. IEEE Computer Society, (2014)