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Exploring the Potential of Architecture-Level Power Optimizations., and . PACS, volume 3164 of Lecture Notes in Computer Science, page 132-147. Springer, (2003)Hardware Identification of Cache Conflict Misses., and . MICRO, page 126-135. ACM/IEEE Computer Society, (1999)Balanced Multithreading: Increasing Throughput via a Low Cost Multithreading Hierarchy., , , and . MICRO, page 183-194. IEEE Computer Society, (2004)Control Flow Optimization Via Dynamic Reconvergence Prediction., , and . MICRO, page 129-140. IEEE Computer Society, (2004)Reducing power with dynamic critical path information., , and . MICRO, page 114-123. ACM/IEEE Computer Society, (2001)Pointer cache assisted prefetching., , , and . MICRO, page 62-73. ACM/IEEE Computer Society, (2002)The CRISP performance model for dynamic voltage and frequency scaling in a GPGPU., and . MICRO, page 281-293. ACM, (2015)A Self-Repairing Prefetcher in an Event-Driven Dynamic Optimization Framework., , and . CGO, page 50-64. IEEE Computer Society, (2006)Instruction Recycling on a Multiple-Path Processor., , and . HPCA, page 44-53. IEEE Computer Society, (1999)Deciphering Predictive Schedulers for Heterogeneous-ISA Multicore Architectures., , and . PMAM@PPoPP, page 51-60. ACM, (2019)