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Evaluating the impact of job scheduling and power management on processor lifetime for chip multiprocessors., , , and . SIGMETRICS/Performance, page 169-180. ACM, (2009)An Event-Driven Multithreaded Dynamic Optimization Framework., , and . IEEE PACT, page 87-98. IEEE Computer Society, (2005)Instruction Recycling on a Multiple-Path Processor., , and . HPCA, page 44-53. IEEE Computer Society, (1999)Multithreaded Value Prediction., and . HPCA, page 5-15. IEEE Computer Society, (2005)Single-ISA Heterogeneous Multi-Core Architectures for Multithreaded Workload Performance., , , , and . ISCA, page 64-75. IEEE Computer Society, (2004)Reducing peak power with a table-driven adaptive processor core., , , and . MICRO, page 189-200. ACM, (2009)Balanced Multithreading: Increasing Throughput via a Low Cost Multithreading Hierarchy., , , and . MICRO, page 183-194. IEEE Computer Society, (2004)Control Flow Optimization Via Dynamic Reconvergence Prediction., , and . MICRO, page 129-140. IEEE Computer Society, (2004)Reducing power with dynamic critical path information., , and . MICRO, page 114-123. ACM/IEEE Computer Society, (2001)The CRISP performance model for dynamic voltage and frequency scaling in a GPGPU., and . MICRO, page 281-293. ACM, (2015)