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Implementation of a Multi-Core Data Link Layer Processor for THz Communication., , , , , and . VTC Spring, page 1-5. IEEE, (2018)A Study of Hardware Complexity for PSSS Systems Based on Real-Valued Spreading Sequences., , , , and . VTC Fall, page 1-5. IEEE, (2021)Fully Parallel Fully Unrolled BP Decoding of LDPC and Polar Codes., , , and . WCNC, page 1-6. IEEE, (2023)A Study of Barker Spreading Codes for High-Speed PSSS Wireless Systems., , , , , , and . EuCNC/6G Summit, page 112-117. IEEE, (2021)100 Gbit/s End-to-End Communication: Adding Flexibility with Protocol Templates., , , , and . LCN, page 263-266. IEEE, (2018)A Modified Rejection-Based Architecture to Find the First Two Minima in Min-Sum-Based LDPC Decoders., , , , and . WCNC, page 1-6. IEEE, (2020)Ultra high speed 802.11n LDPC decoder with seven-stage pipeline in 28 nm CMOS., , , , , , , , and . VTC Spring, page 1-5. IEEE, (2022)Data Link Layer Processor for 100 Gbps Terahertz Wireless Communications in 28 nm CMOS Technology., , , , , , and . IEEE Access, (2019)A Modified Shuffling Method to Split the Critical Path Delay in Layered Decoding of QC-LDPC Codes., , , , and . PIMRC, page 1-6. IEEE, (2019)High-Throughput Multi-Frame Decoding of QC-LDPC Codes With Modified Rejection-Based Minimum Finding., , , and . IEEE Access, (2022)