Author of the publication

Virtual synaptic interconnect using an asynchronous network-on-chip.

, , , and . IJCNN, page 2727-2734. IEEE, (2008)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

Adaptive admission control on the SpiNNaker MPSoC., , and . SoCC, page 243-246. IEEE, (2009)Maximising information recovery from rank-order codes., and . Data Mining, Intrusion Detection, Information Assurance, and Data Networks Security, volume 6570 of SPIE Proceedings, page 65700C. SPIE, (2007)Analytical Assessment of the Suitability of Multicast Communications for the SpiNNaker Neuromimetic System., , , , and . HPCC-ICESS, page 1-8. IEEE Computer Society, (2012)AMULET3: A 100 MIPS Asynchronous Embedded Processor., , and . ICCD, page 329-334. IEEE Computer Society, (2000)An Investigation into the Security of Self-Timed Circuits., , and . ASYNC, page 206-215. IEEE Computer Society, (2003)Built-In Self-Testing of Micropipelines., and . ASYNC, page 22-29. IEEE Computer Society, (1997)A micropipelined ARM., , , , and . VLSI, volume A-42 of IFIP Transactions, page 211-220. North-Holland, (1993)A Spiking Neural Sparse Distributed Memory Implementation for Learning and Predicting Temporal Sequences., , and . ICANN (1), volume 3696 of Lecture Notes in Computer Science, page 115-120. Springer, (2005)The design of a low power asynchronous multiplier., and . ISLPED, page 301-306. ACM, (2004)An asynchronous on-chip network router with quality-of-service (QoS) support., and . SoCC, page 274-277. IEEE, (2004)