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Disambiguation of "Tokairin, Takashi"

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A Low-Power Dual-Band Triple-Mode WLAN CMOS Transceiver.

, , , , , , , , , , , and . IEEE J. Solid State Circuits, 41 (11): 2481-2490 (2006)

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Takashi Seki

Takashi Iwata

Takashi Numaguchi

Takashi Tsuno

Takashi Ohtsuki

 

Other publications of authors with the same name

A 15mW -105dBm Image-Sparse-Sliding-IF Receiver with Transformer-Based on-Chip Q-Enhanced RF Matching Network for a 113dB-Link-Budget BLE 5.0 TRX., , , , , , and . ESSCIRC, page 314-317. IEEE, (2018)An 113DB-Link-Budget Bluetooth-5 SoC with an 8dBm 22%-Efficiency TX., , , , , , , , , and . VLSI Circuits, page 25-26. IEEE, (2018)A 2.1-to-2.8GHz all-digital frequency synthesizer with a time-windowed TDC., , , , and . ISSCC, page 470-471. IEEE, (2010)A 280nW, 100kHz, 1-cycle start-up time, on-chip CMOS relaxation oscillator employing a feedforward period control scheme., , , , , , and . VLSIC, page 16-17. IEEE, (2012)A 3.2 mA-RX 3.5 mA-TX fully integrated SoC for Bluetooth Low Energy., , , , , , , , , and . A-SSCC, page 1-4. IEEE, (2016)A Low-Power Dual-Band Triple-Mode WLAN CMOS Transceiver., , , , , , , , , and 2 other author(s). IEEE J. Solid State Circuits, 41 (11): 2481-2490 (2006)26.1 A 5.5mW ADPLL-based receiver with hybrid-loop interference rejection for BLE application in 65nm CMOS., , , , , , and . ISSCC, page 436-437. IEEE, (2016)