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Efficient Multiway Hash Join on Reconfigurable Hardware., , , , and . TPCTC, volume 12257 of Lecture Notes in Computer Science, page 19-38. Springer, (2019)Design of programmable, energy-efficient reconfigurable accelerators.. Stanford University, USA, (2018)Scalable interconnects for reconfigurable spatial architectures., , , , , and . ISCA, page 615-628. ACM, (2019)Plasticine: A Reconfigurable Architecture For Parallel Paterns., , , , , , , , and . ISCA, page 389-402. ACM, (2017)Automatic Generation of Efficient Accelerators for Reconfigurable Hardware., , , , , and . ISCA, page 115-127. IEEE Computer Society, (2016)Plasticine: A Reconfigurable Accelerator for Parallel Patterns, , , , , , , , and . IEEE Micro, 38 (3): 20--31 (2018)A Study on the Impact of Compiler Optimizations on High-Level Synthesis., , , and . LCPC, volume 7760 of Lecture Notes in Computer Science, page 143-157. Springer, (2012)AI SoC Design Challenges in the Foundation Model Era., , , , , , , , , and 9 other author(s). CICC, page 1-8. IEEE, (2023)CUDA-For-Clusters: A System for Efficient Execution of CUDA Kernels on Multi-core Clusters., , and . Euro-Par, volume 7484 of Lecture Notes in Computer Science, page 415-426. Springer, (2012)(CGRA4HPC) 2022 Invited Speaker: Pushing the Boundaries of HPC with the Integration of AI.. IPDPS Workshops, page 627. IEEE, (2022)