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Hardware/software co-debugging for reconfigurable computing.

, and . HLDVT, page 59-63. IEEE Computer Society, (2000)

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Saving Power by Mapping Finite-State Machines into Embedded Memory Blocks in FPGAs., and . DATE, page 916-921. IEEE Computer Society, (2004)Profile Driven Weighted Decomposition., and . International Conference on Supercomputing, page 165-172. ACM, (1996)Data Buffering and Allocation in Mapping Generalized Template Matching on Reconfigurable Systems., , and . PDPTA, page 1111-1117. CSREA Press, (1999)Implementation of a Thread-Parallel, GPU-Friendly Function Evaluation Library., , , , and . IEEE Access, (2014)Dynamic Partitioning of the Divide-and-Conquer Scheme with Migration in PVM Environment., , and . PVM/MPI, volume 2131 of Lecture Notes in Computer Science, page 174-182. Springer, (2001)Code Optimization and Stabilization for a High-Resolution Terrain Generation Application., , , and . PEARC, page 82:1-82:3. ACM, (2018)GooFit: A library for massively parallelising maximum-likelihood fits., , , , and . CoRR, (2013)Scan-chain based watch-points for efficient run-time debugging and verification of FPGA designs., and . ASP-DAC, page 705-711. ACM, (2003)Iteration Partitioning for Resolving Stride Conflicts on Cache-Coherent Multiprocessors., and . ICPP (2), page 95-102. CRC Press, (1993)MoCSYS: A Multi-Clock Hybrid Two-Layer Router Architecture and Integrated Topology Synthesis Framework for System-Level Design of FPGA Based On-Chip Networks., and . VLSI Design, page 397-402. IEEE Computer Society, (2008)