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Disambiguation of "Chung, Chung-Ping"

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An Or-Parallel Inference Model Based on Multi RISC-Style Processing System.

, , , , and . J. Inf. Sci. Eng., 7 (4): 487-512 (1991)

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Ping-Cheng Chung

Myeong-Kee Chung

Ki-Nam Chung

Ku-Young Chung

Wan Shik Chung

 

Other publications of authors with the same name

Exploiting Java Bytecode Parallelism by Enhanced POC Folding Model (Research Note)., , and . Euro-Par, volume 1900 of Lecture Notes in Computer Science, page 994-997. Springer, (2000)Effects and Handling of Instruction Class Contention in Superscalar Processing., and . Int. J. High Speed Comput., 6 (3): 357-373 (1994)Exploiting Parallelism in the H.264 Deblocking Filter by Operation Reordering., , and . ICA3PP (1), volume 7016 of Lecture Notes in Computer Science, page 80-92. Springer, (2011)Register renaming for x86 superscalar design., , and . ICPADS, page 336-343. IEEE Computer Society, (1996)Set Utilization Based Dynamic Shared Cache Partitioning., and . ICPADS, page 284-291. IEEE Computer Society, (2011)Early load: Hiding load latency in deep pipeline processor., , , and . ACSAC, page 1-8. IEEE Computer Society, (2008)Branch-and-bound task allocation with task clustering-based pruning., , and . J. Parallel Distributed Comput., 64 (11): 1223-1240 (2004)Filtering of Unnecessary Branch Predictor Lookups for Low-power Processor Architecture., and . J. Inf. Sci. Eng., 24 (4): 1127-1142 (2008)Reconfigurable Custom Functional Unit Generation and Exploitation for Multiple-Issue Processors., , and . J. Inf. Sci. Eng., 31 (4): 1431-1453 (2015)Selecting Heterogeneous Computation Blocks for Reconfigurable JPEG Codec Computing., , , , and . ERSA, page 99-106. CSREA Press, (2007)