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Другие публикации лиц с тем же именем

A Single (Unified) Shader GPU Microarchitecture for Embedded Systems., , , , и . HiPEAC, том 3793 из Lecture Notes in Computer Science, стр. 286-301. Springer, (2005)A Victim Cache for Vector Registers., и . International Conference on Supercomputing, стр. 293-300. ACM, (1997)Larrabee: A Many-Core Intel Architecture for Visual Computing.. HiPEAC, том 5952 из Lecture Notes in Computer Science, стр. 2. Springer, (2010)An ISA Comparison Between Superscalar and Vector Processors., , и . VECPAR, том 1573 из Lecture Notes in Computer Science, стр. 548-560. Springer, (1998)Multithreaded Vector Architectures., и . HPCA, стр. 237-248. IEEE Computer Society, (1997)Adding a vector unit to a superscalar processor., , , и . International Conference on Supercomputing, стр. 1-10. ACM, (1999)A Performance Study of Out-of-order Vector Architectures and Short Registers., , и . International Conference on Supercomputing, стр. 37-44. ACM, (1998)Larrabee: a many-core x86 architecture for visual computing., , , , , , , , , и 4 other автор(ы). ACM Trans. Graph., 27 (3): 18 (2008)Speculative Alias Analysis for Executable Code., и . IEEE PACT, стр. 222-231. IEEE Computer Society, (2002)Exploiting a New Level of DLP in Multimedia Applications., , и . MICRO, стр. 72-79. ACM/IEEE Computer Society, (1999)