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Functional extension of structural logic optimization techniques., , , and . ASP-DAC, page 467-472. ACM, (2001)A True Random Number Generator Based on Gait Data for the Internet of You., , , and . IEEE Access, (2020)Theoretical comparison between sequential redundancy addition and removal and retiming optimization techniques., , , and . J. Syst. Archit., 49 (12-15): 529-541 (2003)Towards a Dependable True Random Number Generator With Self-Repair Capabilities., , and . IEEE Trans. Circuits Syst. I Regul. Pap., 65-I (1): 247-256 (2018)An Industrial Environment for High-Level Fault-Tolerant Structures Insertion and Validation., , , , , , and . VTS, page 229-236. IEEE Computer Society, (2002)Approximate TMR for selective error mitigation in FPGAs based on testability analysis., , and . AHS, page 112-119. IEEE, (2018)Briefing power/reliability optimization in embedded software design., , , , , , and . IOLTS, page 185-186. IEEE Computer Society, (2009)Analysis of the Equivalences and Dominances of Transient Faults at the RT Level., , , , , , and . IOLTW, page 193. IEEE Computer Society, (2002)SEU sensitivity of robust communication protocols., , , , , , , , , and . IOLTS, page 188-193. IEEE Computer Society, (2012)Evaluation techniques for on-line testing of robust systems based on critical tasks distribution., , , , and . IOLTS, page 258-263. IEEE Computer Society, (2011)