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Disambiguation of "Mochizuki, Seiji"

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Ultra-low-latency Video Coding Method for Autonomous Vehicles and Virtual Reality Devices.

, , , , and . IOTAIS, page 155-161. IEEE, (2018)

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Seiji Miyashiro

Seiji Osawa

 

Other publications of authors with the same name

Intra texture prediction based on repetitive pixel replenishment., , , and . ICIP, page 2933-2936. IEEE, (2012)71% Reducing the memory bandwidth requirement for a multi-standard video codec by lossless compression of video using a combination of 2D-DPCM and Variable Length Coding., , , , , , and . ICICDT, page 1-5. IEEE, (2016)CGTI-Net: Deep-Learning-Based Object Detection Network for High-Resolution Aerial Images., , , and . IoTaIS, page 169-174. IEEE, (2023)A 342mW mobile application processor with full-HD multi-standard video codec., , , , , , , , , and 4 other author(s). ISSCC, page 158-159. IEEE, (2009)A 256 mW 40 Mbps Full-HD H.264 High-Profile Codec Featuring a Dual-Macroblock Pipeline Architecture in 65 nm CMOS., , , , , , , , , and 2 other author(s). IEEE J. Solid State Circuits, 44 (4): 1184-1191 (2009)4.2 A 12nm Autonomous-Driving Processor with 60.4TOPS, 13.8TOPS/W CNN Executed by Task-Separated ASIL D Control., , , , , , , , , and 2 other author(s). ISSCC, page 56-58. IEEE, (2021)Ultra-low-latency Video Coding Method for Autonomous Vehicles and Virtual Reality Devices., , , , and . IOTAIS, page 155-161. IEEE, (2018)Design and Implementation of Ultra-Low-Latency Video Encoder Using High-Level Synthesis., , , , , and . ISPACS, page 1-2. IEEE, (2019)Ultra-Low-Latency Video Coding with Reduced Frame Memory Structure for 4K/8K High-Resolution Video., , , , , and . GCCE, page 852-853. IEEE, (2023)Clustering Re-Inference Algorithm for Deep Learning-Based Hierarchical Object Detection System., , , and . GCCE, page 817-818. IEEE, (2023)