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Disambiguation of "Hidaka, Hideto"

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Silicon 3D-integration technology and systems.

, , , , , , , , , and . ISSCC, page 510-511. IEEE, (2010)

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Hideto Hiramatsu

 

Other publications of authors with the same name

A built-in self-repair analyzer (CRESTA) for embedded DRAMs., , , , , and . ITC, page 567-574. IEEE Computer Society, (2000)Introduction to the Special Issue on the 2008 IEEE International Solid-State Circuits Conference., , , and . IEEE J. Solid State Circuits, 44 (1): 3-6 (2009)Introduction.. Embedded Flash Memory for Embedded Systems, Springer, (2018)Session 1 overview: Plenary session., and . ISSCC, page 7-9. IEEE, (2012)A 28 nm Embedded Split-Gate MONOS (SG-MONOS) Flash Macro for Automotive Achieving 6.4 GB/s Read Throughput by 200 MHz No-Wait Read Operation and 2.0 MB/s Write Throughput at Tj of 170°C., , , , , , , and . IEEE J. Solid State Circuits, 51 (1): 213-221 (2016)How future mobility meets IT: Cyber-physical system designs revisit semiconductor technology.. A-SSCC, page 1-4. IEEE, (2015)Non-Volatile Memories., and . ISSCC, page 470-471. IEEE, (2007)A shared built-in self-repair analysis for multiple embedded memories., , , , , and . CICC, page 187-190. IEEE, (2001)Redundancy Test for 1 Mbit DRAM Using Multi-Bit-Test Mode., , , , , and . ITC, page 826-829. IEEE Computer Society, (1986)7.3 A 28nm embedded SG-MONOS flash macro for automotive achieving 200MHz read operation and 2.0MB/S write throughput at Ti, of 170°C., , , , , , , , and . ISSCC, page 1-3. IEEE, (2015)