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Disambiguation of "Takamaeda-Yamazaki, Shinya"

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GeMP-BNN: High-Performance Sampling-Free Bayesian Neural Network Accelerator with Gaussian Error Moment Propagation.

, , and . MCSoC, page 522-529. IEEE, (2023)

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Satoko Yamazaki

Shinya Sato

Shinya Minegishi

Noboru Yamazaki

Asuka Yamazaki

 

Other publications of authors with the same name

BRein Memory: A Single-Chip Binary/Ternary Reconfigurable in-Memory Deep Neural Network Accelerator Achieving 1.4 TOPS at 0.6 W., , , , , , , , , and 1 other author(s). IEEE J. Solid State Circuits, 53 (4): 983-994 (2018)Cachet: Low-Overhead Integrity Verification on Metadata Cache in Secure Nonvolatile Memory Systems., and . IEEE Micro, 44 (1): 38-48 (January 2024)FPGA implementation of edge-guided pattern generation for motion-vector estimation of textureless objects., , , , , and . FPL, page 1. IEEE, (2017)Accelerating Decision Tree Ensemble with Guided Branch Approximation., and . HEART, page 24-32. ACM, (2022)Towards a Low-Power Accelerator of Many FPGAs for Stencil Computations., , and . ICNC, page 343-349. IEEE Computer Society, (2012)Protocomputing Architecture over a Digital Medium Aiming at Real-Time Video Processing., , , , , and . Complex., (2018)Ultrasmall: The smallest MIPS soft processor., , , , and . FPL, page 1-4. IEEE, (2014)flipSyrup: Cycle-accurate hardware simulation framework on abstract FPGA platforms., and . FPL, page 1-4. IEEE, (2014)A Tree-Based Checkpointing Architecture for the Dependability of FPGA Computing., , , and . IEICE Trans. Inf. Syst., 101-D (2): 288-302 (2018)GeMP-BNN: High-Performance Sampling-Free Bayesian Neural Network Accelerator with Gaussian Error Moment Propagation., , and . MCSoC, page 522-529. IEEE, (2023)