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Disambiguation of "Hu, Qingsheng"

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Low complexity parallel Chien search architecture for RS decoder.

, , , and . ISCAS (1), page 340-343. IEEE, (2005)

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Qingsheng Ran

Qingsheng Qi

Jun Hu

Zaijun Hu

Bing Hu

 

Other publications of authors with the same name

A 33 Gb/s combined adaptive CTLE and half-rate look-ahead DFE in 0.13 µm BiCMOS technology for serial link., and . IEICE Electron. Express, 15 (4): 20170764 (2018)IBIS-AMI Based PAM4 Signaling and FEC Technique for 25 Gb/s Serial Link., , and . WWIC, volume 10372 of Lecture Notes in Computer Science, page 271-281. Springer, (2017)High-performance FPGA implementation of packet reordering for multiple TCP connections., and . ISCIT, page 318-322. IEEE, (2011)A 20 Gb/s Wireline Receiver with Adaptive CTLE and Half-Rate DFE in 0.13 µm Technology., , and . WWIC, volume 10372 of Lecture Notes in Computer Science, page 292-303. Springer, (2017)A 40 Gb/s PAM4 SerDes Receiver in 65nm CMOS Technology., , and . CCECE, page 1-4. IEEE, (2018)Two Improved Algorithms for Layered QC-LDPC Decoding Algorithm., , and . CCECE, page 1-4. IEEE, (2018)A 6.25Gb/s feed-forward equaliser in 0.18μm CMOS using delay locked loop with load calibration., , and . CSNDSP, page 203-207. IEEE, (2014)Delay Optimization of Power Internet of Things based on Edge-Cloud Collaboration., , and . ICCT, page 905-910. IEEE, (2022)A high-speed and low-power up/down counter in 0.18-μm CMOS technology., and . WCSP, page 1-3. IEEE, (2012)An Effective Differential Power Attack Method for Advanced Encryption Standard., , and . CyberC, page 58-61. IEEE, (2019)