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Disambiguation of "Wu, Nanjian"

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A Discrete-Time Audio ΔΣ Modulator Using Dynamic Amplifier With Speed Enhancement and Flicker Noise Reduction Techniques.

, , , , and . IEEE J. Solid State Circuits, 55 (2): 333-343 (2020)

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Jinglan Wu

Recovery of citric acid from fermentation broth using simulated moving bed technology: = Reinigung von Zitronensäure aus Fermentationslösung durch kontinuierliche Chromatographie. Uni Erlangen-Nürnberg, (2009)

Changzhu Wu

Haiyan Wu

Jinjin Wu

Yinghua Wu

 

Other publications of authors with the same name

Design of High-Speed Drivers for 56Gb/s PAM4 Optical Communications in CMOS., and . ASICON, page 1-4. IEEE, (2019)A Discrete-Time Audio ΔΣ Modulator Using Dynamic Amplifier With Speed Enhancement and Flicker Noise Reduction Techniques., , , , and . IEEE J. Solid State Circuits, 55 (2): 333-343 (2020)A 56Gb/s De-serializer with PAM-4 CDR for Chiplet Optical-I/O., , , , , , , , , and 2 other author(s). ICTA, page 1-2. IEEE, (2022)A Method of Estimating FD Capacitance with Large Size Photodiode in High Speed Imaging (Invited Paper)., , , , , , and . ICTA, page 141-142. IEEE, (2020)A High-Speed Parallel FPGA Implementation of Harris Corner Detection., , , , , , and . ICTA, page 71-72. IEEE, (2020)A Lightweight Integer-STBP On-Chip Learning Method of Spiking Neural Networks For Edge Processors., , , , , , and . ICTA, page 1-2. IEEE, (2023)A Compact On-chip Analog Memory Cell for Storing TOF Image Signal in CMOS Process., , , , , , and . ICTA, page 83-84. IEEE, (2020)A Pixel-Parallel Array Processor without Computational Logic for Computational Image Sensors., , , , , , , , and . ICTA, page 51-52. IEEE, (2021)7.3 A 1000fps vision chip based on a dynamically reconfigurable hybrid architecture comprising a PE array and self-organizing map neural network., , , , , , , and . ISSCC, page 128-129. IEEE, (2014)A low-power 2.4GHz ZigBee transceiver with inductor-less RF front-end for IoT applications., , , and . MWSCAS, page 1332-1335. IEEE, (2017)