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Disambiguation of "Valdes-Garcia, Alberto"

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Antenna-in-package design and module integration for millimeter-wave communication and 5G.

, , , , and . VLSI-DAT, page 1-2. IEEE, (2018)

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Alberto García Ortiz

Alberto Garcia Gonzales

Francisco Valdés Valdés

Oscar Alberto Gonzalez Garcia

Fabio Valdés

 

Other publications of authors with the same name

Antenna-in-package design and module integration for millimeter-wave communication and 5G., , , , and . VLSI-DAT, page 1-2. IEEE, (2018)Scaling Millimeter-Wave Phased Arrays: Challenges and Solutions., , , , , and . BCICTS, page 80-84. IEEE, (2018)A configurable time-interleaved pipeline ADC for multi-standard wireless receivers., , and . ESSCIRC, page 259-262. IEEE, (2004)Multi-Mode Modulator and Frequency Demodulator Circuits for Gb/s Data Rate 60 GHz Wireless Transceivers., , and . CICC, page 639-642. IEEE, (2007)Radio receiver techniques., and . CICC, page 1. IEEE, (2012)Co-Learning Bayesian Model Fusion: Efficient Performance Modeling of Analog and Mixed-Signal Circuits Using Side Information., , , , and . ICCAD, page 575-582. IEEE, (2015)A 24-to-30GHz 256-Element Dual-Polarized 5G Phased Array with Fast Beam-Switching Support for >30, 000 Beams., , , , , , , , , and 3 other author(s). ISSCC, page 436-438. IEEE, (2022)A CMOS RF RMS Detector for Built-in Testing of Wireless Transceivers., , , , and . VTS, page 249-254. IEEE Computer Society, (2005)A 1V 17.9dBm 60GHz power amplifier in standard 65nm CMOS., and . ISSCC, page 424-425. IEEE, (2010)A 10-bit 44-MS/s 20-mW configurable time-interleaved pipeline ADC for a dual-mode 802.11b/Bluetooth receiver., , and . IEEE J. Solid State Circuits, 41 (3): 530-539 (2006)