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15.1 A 0.795fJ/bit Physically-Unclonable Function-Protected TCAM for a Software-Defined Networking Switch., , , , , , , и . ISSCC, стр. 276-278. IEEE, (2024)Efficient Orchestrated AI Workflows Execution on Scale-out Spatial Architecture., , , , , , , , , и 1 other автор(ы). CoRR, (2024)A Systolic Computing-in-Memory Array based Accelerator with Predictive Early Activation for Spatiotemporal Convolutions., , , , , , и . AICAS, стр. 1-5. IEEE, (2023)CV-CIM: A 28nm XOR-Derived Similarity-Aware Computation-in-Memory for Cost-Volume Construction., , , , , , , , , и . ISSCC, стр. 138-139. IEEE, (2023)15.4 A 5.99-to-691.1TOPS/W Tensor-Train In-Memory-Computing Processor Using Bit-Level-Sparsity-Based Optimization and Variable-Precision Quantization., , , , , , , , , и 2 other автор(ы). ISSCC, стр. 242-244. IEEE, (2021)34.1 A 28nm 83.23TFLOPS/W POSIT-Based Compute-in-Memory Macro for High-Accuracy AI Applications., , , , , , , , , и . ISSCC, стр. 566-568. IEEE, (2024)20.2 A 28nm 74.34TFLOPS/W BF16 Heterogenous CIM-Based Accelerator Exploiting Denoising-Similarity for Diffusion Models., , , , , , , , , и 2 other автор(ы). ISSCC, стр. 362-364. IEEE, (2024)A 28nm 77.35TOPS/W Similar Vectors Traceable Transformer Processor with Principal-Component-Prior Speculating and Dynamic Bit-wise Stationary Computing., , , , , , , , , и 1 other автор(ы). VLSI Technology and Circuits, стр. 1-2. IEEE, (2023)MC-CIM: a reconfigurable computation-in-memory for efficient stereo matching cost computation., , , , и . DAC, стр. 457-462. ACM, (2022)