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HARDeNN: Hardware-assisted attack-resilient deep neural network architectures.

, , , , and . Microprocess. Microsystems, (November 2022)

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Low-Cost Software-Implemented Error Detection Technique., , and . ISED, page 318-323. IEEE Computer Society, (2011)Control-flow error detection using combining basic and program-level checking in commodity multi-core architectures., , and . SIES, page 103-106. IEEE, (2011)Leveraging the Potential of Control-Flow Error Resilient Techniques in Multithreaded Programs., , and . CoRR, (2016)Two Efficient Software Techniques to Detect and Correct Control-Flow Errors., , and . PRDC, page 141-148. IEEE Computer Society, (2010)HARDeNN: Hardware-assisted attack-resilient deep neural network architectures., , , , and . Microprocess. Microsystems, (November 2022)SLA-Aware Multi-Criteria Data Placement in Cloud Storage Systems., , and . IEEE Access, (2021)Reliability improvement in private non-uniform cache architecture using two enhanced structures for coherence protocols and replacement policies., and . Microprocess. Microsystems, 38 (6): 552-564 (2014)Dirty data vulnerability mitigation by means of sharing management in cache coherence protocols., and . DFT, page 205-210. IEEE Computer Society, (2012)Control-flow error recovery using commodity multi-core architecture features., , and . IOLTS, page 190-191. IEEE Computer Society, (2011)Soft Error Detection Technique in Multi-threaded Architectures Using Control-Flow Monitoring., , , and . DSD, page 789-792. IEEE Computer Society, (2011)