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Low-Voltage 0, 25 µm CMOS Improved Power Adaptive Issue Queue for Embedded Microprocessors., , , , , and . VLSI-SOC, volume 218 of IFIP Conference Proceedings, page 289-300. Kluwer, (2001)Evaluating design tradeoffs in on-chip power management for CMPs., , and . ISLPED, page 44-49. ACM, (2007)Tradeoffs in power-efficient issue queue design., , , , and . ISLPED, page 184-189. ACM, (2002)Energy-secure swarm power management., , and . DATE, page 1652-1657. IEEE, (2018)Power Aware Heterogeneous Node Assembly., , , and . HPCA, page 715-727. IEEE, (2019)Adaptive Prefetching on POWER7: Improving Performance and Power Consumption., , , , , , and . ACM Trans. Parallel Comput., 1 (1): 4:1-4:25 (2014)Early-Stage Definition of LPX: A Low Power Issue-Execute Processor., , , , , , , , , and 6 other author(s). PACS, volume 2325 of Lecture Notes in Computer Science, page 1-17. Springer, (2002)HE-PEx: Efficient Machine Learning under Homomorphic Encryption using Pruning, Permutation and Expansion., , , , , , , , , and 1 other author(s). CoRR, (2022)Characterization and Exploration of Latch Checkers for Efficient RAS Protection., , , , , , , , , and . DSN-S, page 63-69. IEEE, (2023)Crank it up or dial it down: coordinated multiprocessor frequency and folding control., , , , and . MICRO, page 210-221. ACM, (2013)