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Constructing Large, Durable and Fast SSD System via Reprogramming 3D TLC Flash Memory.

, , , , , , and . MICRO, page 493-505. ACM, (2019)

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Sleep-aware mode assignment in wireless embedded systems., , and . J. Parallel Distributed Comput., 71 (7): 1002-1010 (2011)Balanced loop retiming to effectively architect STT-RAM-based hybrid cache for VLIW processors., , , , , , and . SAC, page 1710-1716. ACM, (2016)Iterational retiming with partitioning: Loop scheduling with complete memory latency hiding., , , and . ACM Trans. Embed. Comput. Syst., 9 (3): 22:1-22:26 (2010)Introduction to the Special Issue on NVM and Storage., and . ACM Trans. Storage, 14 (1): 2:1-2:2 (2018)Boosting the Performance of SSDs via Fully Exploiting the Plane Level Parallelism., , , , , and . IEEE Trans. Parallel Distributed Syst., 31 (9): 2185-2200 (2020)I/O scheduling with mapping cache awareness for flash based storage systems., , , , and . EMSOFT, page 21:1-21:10. ACM, (2016)Power-Aware Variable Partitioning for DSPs With Hybrid PRAM and DRAM Main Memory., , , and . IEEE Trans. Signal Process., 61 (14): 3509-3520 (2013)SERICO: Scheduling Real-Time I/O Requests in Computational Storage Drives., , , , and . DATE, page 1-6. IEEE, (2023)Overcoming Memory Constraint for Improved Target Classification Performance on Embedded Deep Learning Systems., , , , and . HPCC/DSS/SmartCity, page 634-639. IEEE, (2020)Accelerating General-purpose Lossless Compression via Simple and Scalable Parameterization., , , and . ACM Multimedia, page 3205-3213. ACM, (2022)