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Disambiguation of "Maurine, Philippe"

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Extraction of intrinsic structure for Hardware Trojan detection.

, , and . IACR Cryptology ePrint Archive, (2015)

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Philippe Kersting

Philippe Bopp

Philippe Moisan

Philippe Dreuw

Philippe Zysset

 

Other publications of authors with the same name

Security evaluation of dual rail logic against DPA attacks., , , and . VLSI-SoC, page 181-186. IEEE, (2006)Gate Sizing for Low Power Design., , and . VLSI-SOC, volume 218 of IFIP Conference Proceedings, page 301-312. Kluwer, (2001)Circuit sizing method under delay constraint., , , and . ISCAS, IEEE, (2006)Interest of MIA in frequency domain?, , , and . CS2@HiPEAC, page 35-38. ACM, (2015)Statistical timing characterization., , , and . ISSoC, page 1-4. IEEE, (2012)Checking Robustness Against EM Side-Channel Attacks Prior to Manufacturing., , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 41 (5): 1264-1275 (2022)Near-Field Mapping System to Scan in Time Domain the Magnetic Emissions of Integrated Circuits., , , , and . PATMOS, volume 5349 of Lecture Notes in Computer Science, page 229-236. Springer, (2008)Practical Analysis of RSA Countermeasures Against Side-Channel Electromagnetic Attacks., , , and . CARDIS, volume 8419 of Lecture Notes in Computer Science, page 200-215. Springer, (2013)Electromagnetic Fault Injection : How Faults Occur., , and . FDTC, page 9-16. IEEE, (2019)CMOS Gate Sizing under Delay Constraint., , , , and . PATMOS, volume 2799 of Lecture Notes in Computer Science, page 60-69. Springer, (2003)