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Disambiguation of "Bhattacharyya, Shuvra S."

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Logic Foundry: Rapid Prototyping for FPGA-Based DSP Systems.

, , and . EURASIP J. Adv. Signal Process., 2003 (6): 565-579 (2003)

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Somnath Bhattacharyya

Abinaschchandra Bhattacharyya

Arnab Bhattacharyya

Rameswar Bhattacharyya

Jyotirmay Bhattacharyya

 

Other publications of authors with the same name

Communication strategies for shared-bus embedded multiprocessors., and . EMSOFT, page 21-24. ACM, (2005)Evolutionary Algorithm Based Exploration of Software Schedules for Digital Signal Processors, , and . Proceedings of the Genetic and Evolutionary Computation Conference, 2, page 1762--1770. Orlando, Florida, USA, Morgan Kaufmann, (13-17 July 1999)Synthesis of Embedded Software from Synchronous Dataflow Specifications., , and . VLSI Signal Processing, 21 (2): 151-166 (1999)Toward Efficient Many-core Scheduling of Partial Expansion Graphs., , , and . SCOPES, page 100-103. ACM, (2018)Constant-rate clock recovery and jitter measurement on deep memory waveforms using dataflow., , and . I2MTC, page 1590-1595. IEEE, (2015)Partial expansion of dataflow graphs for resource-aware scheduling of multicore signal processing systems., , , and . ACSSC, page 385-392. IEEE, (2014)The hierarchical timing pair model for multirate DSP applications., , and . IEEE Trans. Signal Process., 52 (5): 1209-1217 (2004)Reconfigurable Digital Channelizer Design Using Factored Markov Decision Processes., , , , and . J. Signal Process. Syst., 90 (10): 1329-1343 (2018)Elastic Neural Networks: A Scalable Framework for Embedded Computer Vision., , , and . EUSIPCO, page 1472-1476. IEEE, (2018)Efficient Model Solving for Markov Decision Processes., , and . ISCC, page 1-5. IEEE, (2020)