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Timing Analysis in Precharge/Unate Networks.

, and . DAC, page 124-129. IEEE Computer Society Press, (1990)

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Minimization of Logic Functions Using Essential Signature Sets., , , and . VLSI Design, page 323-328. IEEE Computer Society, (1993)Performance Enhancement through the Generalized Bypass Transform., , , and . ICCAD, page 184-187. IEEE Computer Society, (1991)Fast discrete function evaluation using decision diagrams., , , , and . ICCAD, page 402-407. IEEE Computer Society / ACM, (1995)Delay Prediction for Technology-Independent Logic Equations., , and . ICCD, page 468-471. IEEE Computer Society, (1992)Timing Analysis in Precharge/Unate Networks., and . DAC, page 124-129. IEEE Computer Society Press, (1990)DA Algorithms in Non-EDA Applications: How Universal Are Our Techniques? (Panel)., , , , , and . DAC, page 503. ACM Press, (1994)Espresso-Signature: A New Exact Minimizer for Logic Functions., , , and . DAC, page 618-624. ACM Press, (1993)Verification of Electronic Systems., , and . DAC, page 106-111. ACM Press, (1996)Timed Shannon Circuits: A Power-Efficient Design Style and Synthesis Tool., , , and . DAC, page 254-260. ACM Press, (1995)Trace driven logic synthesis - application to power minimization., , , and . ICCAD, page 581-588. IEEE Computer Society / ACM, (1997)