( en | de | ru )

 

Disambiguation of "Wu, Kai-Chiang"

Author of the publication

copydeleteadd this publication to your clipboard
Test Generation for Defect-Based Faults of Scan Flip-Flops.

, , , , , and . VTS, page 1-7. IEEE, (2023)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

Kai-Yuan Wu

Chiang Liang

Chiang Mai

Joanna Chiang

Hsin-yi Chiang

 

Other publications of authors with the same name

Delay variation tolerance for domino circuits., , and . ASP-DAC, page 354-359. IEEE, (2006)Methodology of Generating Timing-Slack-Based Cell-Aware Tests., , , , , , , , and . ITC, page 1-10. IEEE, (2019)Selective Sensor Placement for Cost-Effective Online Aging Monitoring and Resilience., , , and . ISPD, page 95-102. ACM, (2020)Outlier Detection for Analog Tests Using Deep Learning Techniques., , , , , and . VTS, page 1-7. IEEE, (2023)Methodology of Generating Timing-Slack-Based Cell-Aware Tests., , , , , , , , and . IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 41 (11): 5057-5070 (2022)Mitigating lifetime underestimation: A system-level approach considering temperature variations and correlations between failure mechanisms., , , and . DATE, page 1269-1274. IEEE, (2012)Workload-aware lifetime Trojan based on statistical aging manipulation., , , and . DSC, page 159-165. IEEE, (2017)Re-synthesis for delay variation tolerance., , and . DAC, page 814-819. ACM, (2004)Using Path Features for Hardware Trojan Detection Based on Machine Learning Techniques., , and . ISQED, page 1-8. IEEE, (2023)Identifying Good-Dice-in-Bad-Neighborhoods Using Artificial Neural Networks., , , , , , , , , and . VTS, page 1-7. IEEE, (2021)