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MI6: Secure Enclaves in a Speculative Out-of-Order Processor., , , , , and . MICRO, page 42-56. ACM, (2019)DAWG: A Defense Against Cache Timing Attacks in Speculative Execution Processors., , , , and . MICRO, page 974-987. IEEE Computer Society, (2018)Bridging the GPGPU-FPGA efficiency gap., , , , and . FPGA, page 119-122. ACM, (2011)Sanctum: Minimal Hardware Extensions for Strong Software Isolation., , and . USENIX Security Symposium, page 857-874. USENIX Association, (2016)Leveraging Hardware Isolation for Process Level Access Control & Authentication., , , , and . SACMAT, page 133-141. ACM, (2017)OpenRCL: Low-Power High-Performance Computing with Reconfigurable Devices., , and . FPL, page 458-463. IEEE Computer Society, (2010)Mission Assurance: Beyond Secure Processing., , , , , , , , , and . QRS Companion, page 593-598. IEEE, (2018)Sanctum: Minimal RISC Extensions for Isolated Execution., , and . IACR Cryptology ePrint Archive, (2015)PriviPK: Certificate-less and secure email communication., , , , and . Comput. Secur., (2017)MARC: A Many-Core Approach to Reconfigurable Computing., , , , , , , and . ReConFig, page 7-12. IEEE Computer Society, (2010)