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SET and SEU Hardened Clock Gating Cell., , , and . DCIS, page 1-6. IEEE, (2023)R-Abax: A Radiation Hardening Legalisation Algorithm Satisfying TMR Spacing Constraints., , , , , and . ISVLSI, page 316-321. IEEE, (2020)D-SET Mitigation Using Common Clock Tree Insertion Techniques for Triple-Clock TMR Flip-Flop., , , and . DSD, page 201-205. IEEE Computer Society, (2018)Fast Error Propagation Probability Estimates by Answer Set Programming and Approximate Model Counting., , , and . IEEE Access, (2022)Machine Learning Approach for Accelerating Simulation-based Fault Injection., , , , , and . NorCAS, page 1-6. IEEE, (2021)Flip-Flop SEUs Mitigation through Partial Hardening of Internal Latch and Adjustment of Clock Duty Cycle., , , , and . DDECS, page 9-14. IEEE, (2018)Bits, Flips and RISCs., , , , , , , , , and 3 other author(s). DDECS, page 140-149. IEEE, (2023)Aspects on Timing Modeling of Radiation-Hardness by Design Standard Cell-Based △TMR Flip-Flops., , , and . DSD, page 639-642. IEEE, (2019)Design Concept for Radiation-Hardening of Triple Modular Redundancy TSPC Flip-Flops., , , , and . DSD, page 616-621. IEEE, (2020)A Radiation Tolerant 10/100 Ethernet Transceiver for Space Applications., , , , , , and . IOLTS, page 220-223. IEEE, (2019)