Author of the publication

A High Performance Adaptive Digital LDO Regulator With Dithering and Dynamic Frequency Scaling for IoT Applications.

, , , , , , , , , , and . IEEE Access, (2020)

Please choose a person to relate this publication to

To differ between persons with the same name, the academic degree and the title of an important publication will be displayed. You can also use the button next to the name to display some publications already assigned to the person.

 

Other publications of authors with the same name

3.7V high frequency DC-DC synchronous boost converter with smooth loop handover., , , and . ISCIT, page 191-194. IEEE, (2014)A design of ultra-low noise LDO using noise reduction network techniques., , , , , , and . ISOCC, page 198-199. IEEE, (2017)Internal circuit offset auto compensation current sensor for wireless power systems., , , and . ISOCC, page 176-177. IEEE, (2017)A design of ultra low power I2C synchronous slave controller with interface voltage level independency in 180 nm CMOS technology., , , , and . ISOCC, page 262-263. IEEE, (2017)Design of asynchronous SAR ADC for low power mixed signal applications., , , , and . ISOCC, page 222-223. IEEE, (2017)Design of a capacitor-less LDO with high PSRR for RF energy harvesting applications., , , , and . ISOCC, page 202-203. IEEE, (2017)84 dB DC-gain two-stage class-AB OTA., , , , and . IET Circuits Devices Syst., 13 (5): 614-621 (2019)A Fully Digital AGC System with 100 MHz Bandwidth and 35 dB Dynamic Range Power Detectors for DVB-S2 Application., and . IEICE Trans. Electron., 92-C (1): 127-134 (2009)A Wide-Locking-Range Dual Injection-Locked Frequency Divider With an Automatic Frequency Calibration Loop in 65-nm CMOS., , , , , , , and . IEEE Trans. Circuits Syst. II Express Briefs, 62-II (4): 327-331 (2015)A Design of 5.8GHz Tunable Band Noise Cancelling CMOS LNA for DSRC Communications., and . ISOCC, page 89-90. IEEE, (2020)