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Ising-Based Louvain Method: Clustering Large Graphs with Specialized Hardware.

, , , and . IDA, volume 12695 of Lecture Notes in Computer Science, page 350-361. Springer, (2021)

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High Level Test Generation for Custom Hardware: An Industrial Perspective.. Asian Test Symposium, page 458. IEEE Computer Society, (2005)SymJS: automatic symbolic testing of JavaScript web applications., , and . SIGSOFT FSE, page 449-459. ACM, (2014)Ising-Based Louvain Method: Clustering Large Graphs with Specialized Hardware., , , and . IDA, volume 12695 of Lecture Notes in Computer Science, page 350-361. Springer, (2021)Partitioning Dense Graphs with Hardware Accelerators., , , and . ICCS (3), volume 13352 of Lecture Notes in Computer Science, page 476-483. Springer, (2022)A Technique for Identifying RTL and Gate-Level Correspondences., , , and . ICCD, page 591-594. IEEE Computer Society, (2000)High Level Design Validation: Current Practices and Future Directions., , , and . VLSI Design, page 9-11. IEEE Computer Society, (2004)On automatic generation of RTL validation test benches using circuit testing techniques., and . ACM Great Lakes Symposium on VLSI, page 289-294. ACM, (2003)A design for testability technique for RTL circuits using control/data flow extraction., , and . ICCAD, page 329-336. IEEE Computer Society / ACM, (1996)FSX: fine-grained incremental unit test generation for C/C++ programs., , , , and . ISSTA, page 106-117. ACM, (2016)A BIST Scheme for RTL Controller-Data Paths Based on Symbolic Testability Analysis., , and . DAC, page 554-559. ACM Press, (1998)